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Single classical bit conditioning breaks various functions #6475

@TharrmashasthaPV

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@TharrmashasthaPV

Information

  • Qiskit Terra version: 0.18.0.dev0+f6b2c43
  • Python version: 3.7

What is the current behavior?

The PR #6018 enables classical conditioning of gates on individual bits. However, as mentioned in that PR, this new feature breaks the following functions:

Suggested solutions

The fixes should be simple. Need to look for parts that have ClassicalRegister in condition in these functions and extend them also to cases when Clbit is in condition.

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