Forrest
zhaoxueyan1
I'm Xueyan Zhao, a PHD student in Institute of Computing Technology (ICT), CAS.
BeiJing, China
Paul Stoffregen
PaulStoffregen
Entrepreneur & electrical engineer with 32 years of professional experience and life-long passion for overly ambitious projects
PJRC Portland, Oregon, USA
Yuchi Miao
maksyuki
SoC design engineer at Center for Advanced Computer Systems (ACS) of Institute of Computing Technology, Chinese Academy of Sciences.
founder @microdynamics
Institute of Computing Technology, CAS Beijing, China
wafer.space
wafer-space
Budget silicon manufacturing -- create integrated circuits without breaking the bank.
Singapore
openXC7
openXC7
Free and open source FPGA toolchain for AMD/Xilinx Series 7 chips, including Kintex-7. Supports Kintex7 (including 325/420/480t), Artix7, Spartan7 and Zynq7.
Peter Kinget
peterkinget
https://peterkinget.github.io
https://mosbius.org
https://vlsidesignlab.org
https://learninganalog.org
Columbia University, Dept. of Electrical Engineering New Jersey
Anton Maurovic
algofoogle
I enjoy making software, designing hardware, writing documentation, and helping others on their own learning journeys.
Adelaide, Australia
Ethan Sifferman
sifferman
I am a Lecturer turned PhD student at UC Santa Cruz. I regularly contribute to open-source VLSI tools.
UC Santa Cruz California
stnolting
Roads? Where we're going we don't need roads. - "Doc" Emmett L. Brown
@fraunhofer-ims 🇪🇺 European Union
RISC-V International Open Source Laboratory
RIOSLaboratory
The RISC-V International Open Source Laboratory (RIOS Lab) will bring the research effort of RISC-V CPU ecosystems from UC Berkeley to the rest of the world
Sumanto Kar
Eyantra698Sumanto
Assist. Project Manager, IIT Bombay | M. Tech. IEOR, IITB | Electronics Engineer, Mumbai University | Interests in VLSI, Optimization, etc.
IIT Bombay Mumbai, India
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