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@kamilrakoczy kamilrakoczy commented Nov 12, 2024

What are the reasons/motivation for this change?

This PR fixes setting bits of parameters in setundef pass.

Explain how this is achieved.

Currently we are looping through module parameters using for (auto bit : parameter.second).
It is equivalent to:

for( auto _bit = parameter.second.begin(); _bit != parameter.second.end(); _bit++) {
    auto bit = *_bit;
    ...
}

where auto is resolved to RTLIL::Const.

Iterator that we are using is defined in Const class which iterates through State enum.

operator * of iterator returns copy of the state.

This PR changes to use reference instead.

If applicable, please suggest to reviewers how they can test the change.

I attached example test case that showcase the problem.

Fixes: #4732

This commit also adds test that verifies correctness of this change.
tgorochowik added a commit to chipsalliance/synlig that referenced this pull request Nov 22, 2024
This PR updates yosys.

It also applies patch to yosys until:
YosysHQ/yosys#4733 will be merged upstream.
@widlarizer widlarizer merged commit ec8b745 into YosysHQ:main Mar 28, 2025
26 checks passed
@kamilrakoczy kamilrakoczy deleted the fix-setundef-pass-for-params branch March 28, 2025 12:36
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Module parameters are not affected by setundef pass
4 participants