Experimenting with RISC-V, FPGAs etc.
I am a PhD student at the University Freiburg researching on SBST generation for RISC-V.
Chair of Electronic Design Automation
RPTU-EIS
Lehrstuhl für Entwurf informationstechnischer Systeme der RPTU in Kaiserslautern
Germany
Lucas Deutschmann
Seek64
PhD Student in Formal Hardware Verification for Security. I also like to write very short and obfuscated Python programs for fun.
RPTU Kaiserslautern-Landau
CAD & Reliability Group
cad-polito-it
Works produced by the CAD & Reliability group of the Department of Control and Computer Engineering (DAUIN) of Politecnico di Torino
Italy
Nicholas Dille
nicholasdille
DevOps Engineer | Containers, Kubernetes, Automation, Observability, Continuous Delivery
@Haufe-Lexware Freiburg, Germany
Quinton Miller
HertzDevil
crystal language core team • feh wiki admin & forensics person • maker of 0cc-famitracker • love is the pulse of the stars
Hong Kong SAR