boards/nucleo-f767zi: add correct flash bank openocd config #13179

fjmolinas · 2020-01-21T16:47:49Z

Contribution description

This pr fixes flashing bin files on nucleo-f767zi, this issue is not present on all nucleo-f7* boards.

Flashing bin files on nucleo-f767zi fails for two reasons:

fails to probe flash

### Flashing Target ###
WARN: Failed to probe board flash.
WARN: Falling back to using the openocd configuration value.
Binfile detected, adding ROM base address: 0x00000000
Flashing with IMAGE_OFFSET: 0x00000000

backup openocd configuration value is wrong

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
flash bank $_CHIPNAME.otp stm32f2x 0x1ff0f000 0 0 0 $_TARGETNAME

Playing around with openocd.sh I have found that flash probe 0 fails on this BOARD when srst is asserted, but if srst is deasserted probing fails anyway if the device is hardfaulted or in sleep mode.

I couldn't find the reason why probing fails in this case, but to keep asserting srst I added the correct FLASH_ADDR in our stm32f7.cfg file and added FLASH_BANK to allow specifying which flash bank to use as configuration input and not use the one in target/stm32f7x.cfg

Testing procedure

make -C tests/riotboot/ BOARD=nucleo-f767zi flash

aabadie

Some typos and questions.

I won't be able to test before next week.

aabadie · 2020-01-21T17:43:12Z

boards/common/stm32/dist/stm32f7.cfg

@@ -1,3 +1,6 @@
 source [find target/stm32f7x.cfg]
+
+flash bank $_FLASHNAME.noprobe stm32f2x 0x08000000 0 0 0 $_TARGETNAME


Why stm32f2x ? Shouldn't it be stm32f7x instead ?

To be honest I just used the same config that was in the openocd file, but replacing the address. I'll take a close look at all the parameters.

Ok, had a look stm32f7 doesn't have a specific flash driver they use stm32f2x, see files in https://github.com/ntfreak/openocd/tree/master/src/flash/nor and have a look at

https://github.com/ntfreak/openocd/blob/f98099507f509db9a18c70365490a6b9f67108db/src/flash/nor/stm32f2x.c#L67-L83

dist/tools/openocd/openocd.sh

boards/nucleo-f767zi/Makefile.include

fjmolinas · 2020-01-21T21:12:13Z

I won't be able to test before next week.

You have acces to my CI machine, you can test there, the board is connected.

aabadie

Looks good, well documented and works: I tested on nucleo-f767zi and nucleo-f746zg. On master, flashing tests/riotboot fails on nucleo-f767zi but it works with this PR. This PR has no negative impact on other F7 boards.

Unfortunately, I found some typos and some reworking to improve the inline comments. You can squash all changes.

boards/common/stm32/dist/stm32f7.cfg

boards/nucleo-f767zi/Makefile.include

Allow specifying index of `flash bank` to read configuration from in cases where the configuration provided in openocd is incorrect. This is the case for the majority of stm32 boards where it relies on `flash probe` to get the correct value.

openocd configuration file for `stm32f7` relies on probing to find out FLASH_ADDR. On nucleo-f767zi board probing (`flash probe 0`) fails when `srst` is asserted, but `srst` needs to be asserted to be able to flash the `BOARD` when sleeping or after a hardfault. To circumvent this in boards/common/stm32/dist/stm32f7.cfg we define a new flash bank with the appropriate fash start address and specify that this is the flash bank to be used as default configuration instead of the default by setting FLASH_BANK=4

fjmolinas · 2020-01-28T09:43:44Z

@aabadie all green!

aabadie

No more typo and was already tested with success.

ACK and go!

fjmolinas · 2020-01-28T09:53:52Z

Backport provided in #13219

kfessel · 2020-02-21T16:32:02Z

According to gdb this leads to: Overlapping regions in memory map, which results in it being ignored and me not being able to set breakpoints.
gdb: warning: Overlapping regions in memory map: ignoring

gdb tells openocd to set soft break points, if it does not know about the memory map, which do not work (in flash regions?).

older versions of openocd (current ubuntu) ignore if gdb tells them to set soft breakpoints and decide on their own depending o the address.

kfessel · 2020-02-24T16:21:57Z

please have a look at what this PR does

it adds information to stm32f7.cfg (an openocd config file) which is not correct (the added flash information about the place but is 0 in size)
but the information is not used for openocd, but for openocd.sh ( openocd can never use it since it is wrong)
then openocd.sh is modified to be able to use such extra information (add FLASH_BANK)
(at this stage it will never ever use the information that it probes even if the probe finishes correctly which make this part senceles, if FLASH_BANK is set to an other Value then 1)
then the Makefile.import for the nucelof... is modified to set FLASH_BANK to 4 which is will trigger the line before

this all is done to somehow push an Address from the board information to openocd.sh. I think it would have been easier if you just provide the address in Makefile.import, and modified openocd.sh to use such a address if it exists (may also be possible that such a mechanism allready exists)

see the attached tt-patch.txt

btw the line:

 flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME

tells openocd to use auto configuration for the flash

http://www.openocd.org/doc/html/Flash-Commands.html#index-stm32f2x

tt-patch.txt

fjmolinas added Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors) Process: needs backport Integration Process: The PR is required to be backported to a release or feature branch labels Jan 21, 2020

fjmolinas requested review from kaspar030 and aabadie January 21, 2020 16:48

aabadie reviewed Jan 21, 2020

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benpicco added CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR and removed CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Jan 22, 2020

aabadie requested changes Jan 27, 2020

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fjmolinas added 2 commits January 27, 2020 22:32

fjmolinas force-pushed the pr_openocd_stm32f7_probe branch from aa86295 to 1dec5ba Compare January 27, 2020 21:32

fjmolinas added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Jan 28, 2020

aabadie approved these changes Jan 28, 2020

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aabadie merged commit 98995f6 into RIOT-OS:master Jan 28, 2020

fjmolinas deleted the pr_openocd_stm32f7_probe branch January 28, 2020 09:53

fjmolinas mentioned this pull request Jan 28, 2020

boards/nucleo-f767zi: add correct flash bank openocd config [backport 2020.01] #13219

Merged

kfessel mentioned this pull request Feb 24, 2020

Revert "boards/nucleo-f767zi: add correct flash bank openocd config" #13457

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boards/nucleo-f767zi: add correct flash bank openocd config #13179

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		@@ -1,3 +1,6 @@
		source [find target/stm32f7x.cfg]

		flash bank $_FLASHNAME.noprobe stm32f2x 0x08000000 0 0 0 $_TARGETNAME

boards/nucleo-f767zi: add correct flash bank openocd config #13179

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Contribution description

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