Skip to content

Conversation

gschorcht
Copy link
Contributor

Contribution description

This PR fixes the RNG clock configuration for STM32U5.

The RNG peripheral can only use HSI48, HSI48/2 or HSI16, see Reference Manual, section 11.8.47 RCC_CCIPR2, page 590:

Bits 13:12 RNGSEL[1:0]: RNG kernel clock source selection
These bits are used to select the RNG kernel clock source.
00: HSI48 selected
01: HSI48 / 2 selected, can be used in range 4
10: HSI16 selected
11: reserved

Using MSI as 48 MHz clock source for RNG is not possible. The clock configuration in cpu/stm32/stmclk/stmclk_u5.c activates anyway only the MSIS but not the MSIK which could be used for certain peripherals.

Therefore, this PR

  • removes the configuration of MSI as 48 MHz clock for RNG and its selection in RCC->CCIPR1.ICLKSEL
  • enables HSI48 and selects it for RNG.

The HSI48 will also be used in future for certain peripherals such as USB OTG FS and SDMMC.

Testing procedure

BOARD=b-u585i-iot02a make -j8 -C tests/periph/hwrng/ flash term

should work as expected.

Issues/PRs references

The RNG can use HSI48, HSI48/2 or HSI16. Using MSI as 48 MHz clock source for RNG is not possible. The clock configuration in `stmclk_u5.c` activates anyway only the MSIS but not the MSIK which could be used for certain peripherals.

Therefore, this commit
- removes the configuration of MSI as 48 MHz clock for RNG and its selection in `RCC->CCIPR1.ICLKSEL`
- enables HSI48 select it for RNG.

The HSI will also be used in future for certain peripherals such as USB OTG FS and SDMMC.
@github-actions github-actions bot added Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: cpu Area: CPU/MCU ports labels Jul 4, 2023
@gschorcht gschorcht added Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors) CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Jul 4, 2023
@@ -267,7 +242,7 @@ void stmclk_init_sysclk(void)
while (!(RCC->CR & RCC_CR_HSERDY)) {}
}

/* Enable the MSI clock only when it's used */
/* Enable the MSIS clock only when it's used */
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Is this a typo? Or should MSI be replaced by MSIS consistently?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

🤔 good question. It is used by intention here. There is one clock generator MSI which can generate the two different output clocks MSIS and MSIK that have to be enabled separately. In fact, only the MSIS output is configured here but the clock generator is the MSI.

@riot-ci
Copy link

riot-ci commented Jul 4, 2023

Murdock results

✔️ PASSED

e6d737e cpu/stm32: fix RNG clock configuration for STM32U5

Success Failures Total Runtime
6931 0 6931 11m:24s

Artifacts

@benpicco
Copy link
Contributor

benpicco commented Jul 6, 2023

bors merge

bors bot added a commit that referenced this pull request Jul 6, 2023
19789: cpu/nrf5x/periph/wdt: enable support for nRF53/nRF9160 r=benpicco a=dylad

### Contribution description

This PR enables support for the watchdog driver on nRF53.
This MCU has two watchdog peripherals, for now, it only uses the first one.
The use of the second watchdog can be add in a followup PR later.


### Testing procedure
Flash and play with `tests/periph/wdt` application.


### Issues/PRs references
None.


19796: boards/b_u585i_ iot02a/periph usbdev r=benpicco a=gschorcht

### Contribution description

This PR adds the USB OTG support for STM32U5 and the `b_u585i_iot02a` board.

This PR includes PR #19795 since it uses directly the changes made in PR #19795.

### Testing procedure

Compile and flash
```
BOARD=b-u585i-iot02a make -C tests/sys/usbus_cdc_ecm/ flash term
```
Use the `sudo dmesg` command to get the kernel messages.
```pyhon
[766948.556645] usb 1-2.2: new full-speed USB device number 108 using xhci_hcd
[766948.658688] usb 1-2.2: New USB device found, idVendor=1209, idProduct=7d00, bcdDevice= 1.00
[766948.658696] usb 1-2.2: New USB device strings: Mfr=3, Product=2, SerialNumber=4
[766948.658699] usb 1-2.2: Product: b-u585i-iot02a
[766948.658702] usb 1-2.2: Manufacturer: RIOT-os.org
[766948.658704] usb 1-2.2: SerialNumber: AA140057DA41D467
[766948.668681] cdc_ether 1-2.2:1.0 usb0: register 'cdc_ether' at usb-0000:00:14.0-2.2, CDC Ethernet Device, ea:dc:44:71:d9:24
[766948.743250] cdc_ether 1-2.2:1.0 enxeadc4471d924: renamed from usb0
```
Use the `ifconfig` command on the node to determine the IPv6 LLUA and ping the node.
```
ping6 -c 3 fe80::e8dc:44ff:fe71:c524%enxeadc4471d924
PING fe80::e8dc:44ff:fe71:c524%enxeadc4471d924(fe80::e8dc:44ff:fe71:c524%enxeadc4471d924) 56 data bytes
64 bytes from fe80::e8dc:44ff:fe71:c524%enxeadc4471d924: icmp_seq=1 ttl=64 time=0.523 ms
64 bytes from fe80::e8dc:44ff:fe71:c524%enxeadc4471d924: icmp_seq=2 ttl=64 time=0.546 ms
64 bytes from fe80::e8dc:44ff:fe71:c524%enxeadc4471d924: icmp_seq=3 ttl=64 time=0.599 ms
```

### Issues/PRs references

Includes PR #19795 

19802: cpu/nrf53: enable flashpage support r=benpicco a=dylad

### Contribution description
This PR enables flashpage support on nRF53 family.
The peripheral is identical to nRF52, just add the flashpage configuration and enable the module in both Makefiles.features and Kconfig.


### Testing procedure
run `/tests/periph/flashpage` on `nrf5340dk-app`

output of `make BOARD=nrf5340dk-app flash test`


```
/home/dylan/work/RIOT/dist/tools/pyterm/pyterm -p "/dev/ttyACM0" -b "115200" --no-reconnect --noprefix --no-repeat-command-on-empty-line 
Twisted not available, please install it if you want to use pyterm's JSON capabilities
Connect to serial port /dev/ttyACM0
Welcome to pyterm!
Type '/exit' to exit.

> 
> 
test_last_raw

> test_last_raw
wrote raw short buffer to last flash page
> help
help
Command              Description
---------------------------------------
info                 Show information about pages
dump                 Dump the selected page to STDOUT
dump_local           Dump the local page buffer to STDOUT
read                 Copy the given page to the local page buffer and dump to STDOUT
write                Write the local page buffer to the given page
write_raw            Write (ASCII, max 64B) data to the given address
erase                Erase the given page buffer
edit                 Write bytes to the local page buffer
test                 Write and verify test pattern
test_last_pagewise   Write and verify test pattern on last page available
test_last_pagewise
test_reserved_pagewise Write and verify short write on reserved page
test_last_raw        Write and verify raw short write on last page available
> test_last_pagewise
wrote local page buffer to last flash page
> help
help
Command              Description
---------------------------------------
info                 Show information about pages
dump                 Dump the selected page to STDOUT
dump_local           Dump the local page buffer to STDOUT
read                 Copy the given page to the local page buffer and dump to STDOUT
write                Write the local page buffer to the given page
write_raw            Write (ASCII, max 64B) data to the given address
erase                Erase the given page buffer
edit                 Write bytes to the local page buffer
test                 Write and verify test pattern
test_last_pagewise   Write and verify test pattern on last page available
test_reserved_pagewise Write and verify short write on reserved page
test_reserved_pagewise
test_last_raw        Write and verify raw short write on last page available
> test_reserved_pagewise
Reserved page num: 5 
Since the last firmware update this test has been run 0 times 
wrote local page buffer to reserved flash page

When running on a bootloader, as an extra check, try restarting the board and check whether this application still comes up.
> help
help
Command              Description
---------------------------------------
info                 Show information about pages
dump                 Dump the selected page to STDOUT
dump_local           Dump the local page buffer to STDOUT
read                 Copy the given page to the local page buffer and dump to STDOUT
write                Write the local page buffer to the given page
write_raw            Write (ASCII, max 64B) data to the given address
erase                Erase the given page buffer
edit                 Write bytes to the local page buffer
test                 Write and verify test pattern
test_last_pagewise   Write and verify test pattern on last page available
test_reserved_pagewise Write and verify short write on reserved page
test_last_raw        Write and verify raw short write on last page available
> 
make : on quitte le répertoire « /home/dylan/work/RIOT/tests/periph/flashpage »

```
### Issues/PRs references
None.


19803: cpu/nrf5x_common: rework LFCLK source selection r=benpicco a=dylad

### Contribution description
This PR changes the source selection of LFCLK for all nRF families.
This idea is to use the values provided by Nordic vendor files to properly populate the source of the LFCLK. Then setup a per CPU check to ensure the value provided at board level is fine. In the end, the LFCLK source selection is a mere assignment.
The selection of the LFCLK source is still done at board level. I also add a bit of documentation to help users to select another value if needed.


I'll provide in a followup PR, `periph_rtt` support for both nRF9160 and nRF53.

### Testing procedure
CI should be enough I think. Otherwise, one can ran tests/periph/rtt on any nRF51-based board and any nRF52-based board.
You can also change the LFCLK source at board level to ensure the guards are doing their jobs.

### Issues/PRs references
None.

Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
@bors
Copy link
Contributor

bors bot commented Jul 6, 2023

Merge conflict.

@gschorcht
Copy link
Contributor Author

This PR was also part of PR #19796, so this PR is now obsolete after the merge of PR #19796. Although I mentioned in PR #19796 that it includes this PR, I accidentally forgot to set the label Waiting for other PR there 😟

@gschorcht gschorcht closed this Jul 7, 2023
@gschorcht gschorcht deleted the cpu/stm32/fix_stmclk_u5_rng branch September 10, 2023 11:14
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Area: cpu Area: CPU/MCU ports CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors)
Projects
None yet
Development

Successfully merging this pull request may close these issues.

4 participants