It seems to me that some registers are missing for the x86 architecture. The list and description is taken from section 8.1.8 of the Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 1

• FIP: The x87 FPU Instruction Pointer Offset (FIP) comprises 64 bits on processors that support IA-32e mode; on
  other processors, it offset comprises 32 bits.
• FCS: The x87 FPU Instruction Pointer Selector (FCS) comprises 16 bits.
• FDP: The x87 FPU Data Pointer Offset (FDP) comprises 64 bits on processors that support IA-32e mode; on other
  processors, it offset comprises 32 bits.
• FDS: The x87 FPU Data Pointer Selector (FDS) comprises 16 bits.
• FOP: The x87 FPU stores in the 11-bit x87 FPU opcode register (FOP) the opcode of the last x87 non-control instruction
  executed that incurred an unmasked x87 exception

Those registers are for example used by the FXSAVE and FXRSTOR instructions.