FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
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Updated
May 11, 2023 - VHDL
FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
Custom 64-bit pipelined RISC processor
FISC - Flexible Instruction Set Computer - Is the new Instruction Set Architecture inspired by ARMv8 and x86-64
Dual-core 16-bit RISC processor
An implementation of the LC-3 architecture in VHDL, as described in the book "Introduction to Computing Systems by P&P".
A small RISC-V core (VHDL)
Implementation of a custom GPU ISA microarchitecture called GBox16 based around NVIDIA and AMD microarchitectures
an ARM9 compatible CPU core written in Verilog, and related experiments
8-bit MISC processor with pipelining
A pedagogical processor on FPGA, developed at NIIT University.
My first processor written in HDL language
16-bit RISC processor with von Neumann architecture
Accumulator-based 4-bit processor
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