Source code for various Verilog-based projects and assignments
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Nov 8, 2018 - Verilog
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combinational-logic
Here are 9 public repositories matching this topic...
EE89H Final Project
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Dec 24, 2017 - Verilog
Designing Single-Cycle Microprocessor without Interlocked Pipeline Stages (MIPS) using Verilog.
fpga verilog computer-architecture test-bench mips-processor digital-design computer-organization combinational-logic sequential-logic
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Jul 5, 2024 - Verilog
Verilog codes related to digital logic design are available
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Jun 1, 2025 - Verilog
Basic combinational logic design using Verilog hardware description language (HDL). A step-by-step basic combinational logic design using built-in primitives. Used Vivado 2018.3 as a text editor and simulator.
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May 27, 2025 - Verilog
HDLBit-Pratice. https://hdlbits.01xz.net/wiki/Main_Page
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Feb 15, 2025 - Verilog
An 8-bit array multiplier is a combinational circuit that multiplies two 8-bit binary numbers using a grid of AND gates for partial product generation and full/half adders for their parallel addition. It offers high-speed operation through simultaneous processing, structured in a regular, hardware-efficient layout.
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Jul 13, 2025 - Verilog
Tic-Tac-Toe game built in Verilog for hardware implementation. Features modular cell design, automatic player switching, parallel win detection, and game state management. Pure digital logic handling the entire game flow.
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Jun 14, 2025 - Verilog
Basic tools, methods and procedures to design combinational and sequential digital circuits and systems. Topics include number systems, Boolean algebra, logic minimization, circuit design, memory elements, and finite state machine design.
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Dec 6, 2019 - Verilog
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