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@L-M-Sherlock
Jarrett Ye L-M-Sherlock
233333

@maimemo Qingyuan, Guangdong, China

@purcell
Steve Purcell purcell
I optimise software and human systems, and make them happier.

Ireland

@gipsyh
Yuheng Su gipsyh

ISCAS; UCAS Beijing, China

@gorhill
Raymond Hill gorhill
_

Canada / Québec

@riscv
RISC-V riscv
The Open-Standard Instruction Set Architecture

Zurich, CH

@SpriteOvO
Asuna SpriteOvO
C++, C, Rust / Cross-platform desktop & former Windows kernel driver developer, reverse engineer / Owning a HomeLab / Working at late night / BTW, I use Arch.

PLCT Lab Wuhan <- Chengdu, China

@gussmith23
Gus Smith gussmith23
Recently graduated Computer Architecture and Programming Languages PhD @ University of Washington

University of Washington Seattle, WA

@felixonmars
Felix Yan felixonmars
Arch Linux Developer, RISC-V Porter, probably a fox. PGP Key: 0x786C63F330D7CB92

Arch Linux @archlinux Wuhan, China

@bespoke-silicon-group
Bespoke Silicon Group bespoke-silicon-group
Accelerating productive, PPA-optimal HW Design
@adwait
Adwait Godbole adwait
Graduate Student, UC Berkeley
@beehive-lab
Beehive lab beehive-lab
Beehive lab is part of the Advanced Processor Technologies Group at the University of Manchester specializing in hw/sw codesign.

United Kingdom

@guillemlp
Guillem López Paradís guillemlp
PhD in Computer Architecture at Barcelona Supercomputing Center (BSC) and Polytechnic University of Catalonia (UPC)

Spain

@dobios
Amelia Dobis dobios
PhD Student at Princeton Universtiy | PL for Hardware | MSc ETHZ, BSc EPFL

Princeton University Philadelphia, PA, USA

@don-brady
Don Brady don-brady
ZFS developer since 2006

Colorado

@minad
Daniel Mendler minad
minadmacs

Germany

@riscv-software-src
RISC-V Software riscv-software-src
The Open-Standard Instruction Set Architecture

Switzerland

@www-asics-ws
Rudolf Usselmann www-asics-ws
ASICS/FPGA/System Design House. IP Cores and design services. From Concept to final product. Architecture, Design, Implementation.

ASICS World Services, Co. Ltd.

@YosysHQ
Yosys Headquarters YosysHQ
Yosys Open SYnthesis Suite
@dan-zheng
Dan Zheng dan-zheng
Principled engineering and science.

Google Bay Area

@trailofbits
Trail of Bits trailofbits
More code: binary lifters @lifting-bits, blockchain @crytic, forks @trail-of-forks

New York, New York

@chenweiphd
Dr. CHEN Wei. chenweiphd
Senior chip expert, AI algorithm-chip co-design expert, professional at IC architecture and compute-in-memory
@RIOSLaboratory
RISC-V International Open Source Laboratory RIOSLaboratory
The RISC-V International Open Source Laboratory (RIOS Lab) will bring the research effort of RISC-V CPU ecosystems from UC Berkeley to the rest of the world
@anishathalye
Anish Athalye anishathalye

@cleanlab San Francisco, CA

@apple
Apple apple

Cupertino, CA

@ghidra1
Ghidra1 ghidra1
Ghidra Developer
@fujitsu
Fujitsu fujitsu
For a complete list of official Fujitsu Group social media accounts, including policies, please visit http://www.fujitsu.com/jp/about/resources/socialmedia/.
@ezhes
Allison Husain ezhes
Kernels, security research, and terrifying hardware

Berkeley, CA

@quark17
Julie Schwartz quark17

Bluespec, Inc Framingham, MA, USA

@apollo-lhc
Apollo platform for CMS and ATLAS at CERN apollo-lhc
GitHub repository for the Apollo ATCA blade project for CMS and ATLAS
@ktbarrett
Kaleb Barrett ktbarrett

Hudson River Trading Boulder, CO