Checklist

• 1. I have searched related issues but cannot get the expected help.
• 2. The bug has not been fixed in the latest version.
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Describe the bug

KeyError: 'layers.22.mlp.gate_up_proj.weight'

Reproduction

python -m sglang.launch_server --model-path Qwen/Qwen3-Embedding-8B --dtype bfloat16 --trust-remote-code --is-embedding

Environment

Python: 3.12.10 (main, Apr 9 2025, 04:03:51) [Clang 20.1.0 ]
CUDA available: True
GPU 0,1,2,3,4,5,6,7: NVIDIA A800-SXM4-80GB
GPU 0,1,2,3,4,5,6,7 Compute Capability: 8.0
CUDA_HOME: /usr/local/cuda-12.2
NVCC: Cuda compilation tools, release 12.2, V12.2.128
CUDA Driver Version: 535.86.10
PyTorch: 2.6.0+cu124
sglang: 0.4.6.post5
sgl_kernel: 0.1.4
flashinfer_python: 0.2.5
triton: 3.2.0
transformers: 4.51.1
torchao: 0.9.0
numpy: 2.2.6
aiohttp: 3.12.9
fastapi: 0.115.12
hf_transfer: 0.1.9
huggingface_hub: 0.31.4
interegular: 0.3.3
modelscope: 1.25.0
orjson: 3.10.18
outlines: 0.1.11
packaging: 25.0
psutil: 7.0.0
pydantic: 2.11.4
python-multipart: 0.0.20
pyzmq: 26.4.0
uvicorn: 0.34.2
uvloop: 0.21.0
vllm: 0.8.4
xgrammar: 0.1.19
openai: 1.77.0
tiktoken: 0.9.0
anthropic: 0.50.0
litellm: 1.67.5
decord: 0.6.0
NVIDIA Topology:
�[4mGPU0 GPU1 GPU2 GPU3 GPU4 GPU5 GPU6 GPU7 NIC0 NIC1 NIC2 NIC3 CPU Affinity NUMA Affinity GPU NUMA ID�[0m
GPU0 X NV8 NV8 NV8 NV8 NV8 NV8 NV8 SYS SYS NODE PXB 0-63 0 N/A
GPU1 NV8 X NV8 NV8 NV8 NV8 NV8 NV8 SYS SYS NODE PXB 0-63 0 N/A
GPU2 NV8 NV8 X NV8 NV8 NV8 NV8 NV8 SYS SYS PXB NODE 0-63 0 N/A
GPU3 NV8 NV8 NV8 X NV8 NV8 NV8 NV8 SYS SYS PXB NODE 0-63 0 N/A
GPU4 NV8 NV8 NV8 NV8 X NV8 NV8 NV8 NODE PXB SYS SYS 64-127 1 N/A
GPU5 NV8 NV8 NV8 NV8 NV8 X NV8 NV8 NODE PXB SYS SYS 64-127 1 N/A
GPU6 NV8 NV8 NV8 NV8 NV8 NV8 X NV8 PXB NODE SYS SYS 64-127 1 N/A
GPU7 NV8 NV8 NV8 NV8 NV8 NV8 NV8 X PXB NODE SYS SYS 64-127 1 N/A
NIC0 SYS SYS SYS SYS NODE NODE PXB PXB X NODE SYS SYS
NIC1 SYS SYS SYS SYS PXB PXB NODE NODE NODE X SYS SYS
NIC2 NODE NODE PXB PXB SYS SYS SYS SYS SYS SYS X NODE
NIC3 PXB PXB NODE NODE SYS SYS SYS SYS SYS SYS NODE X

Legend:

X = Self
SYS = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI)
NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node
PHB = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU)
PXB = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge)
PIX = Connection traversing at most a single PCIe bridge
NV# = Connection traversing a bonded set of # NVLinks

NIC Legend:

NIC0: mlx5_bond_0
NIC1: mlx5_bond_1
NIC2: mlx5_bond_2
NIC3: mlx5_bond_3

ulimit soft: 1024