- United Kingdom
- https://www.linkedin.com/in/andremsouto
Jari Honkanen
johonkanen
Maintainer of high level synthesizable VHDL (hVHDL) project on github
Sayran Felix
SayranFelix
- Hello, my name's is Sayran, I'm 14 years old and my dream is to be a great programmer! 😄
Katharina
KatCe
Hardware Security Researcher @comsec-group ETH Zurich, Ex-CERN Embedded Software Developer / Digital Electronics Verification Engineer
ETH Zurich Zurich
Bruno Levy
BrunoLevy
Researcher in computational physics,
Scientific director of Inria Quadrant Program,
2018-2022 director of centre Inria Nancy Grand-Est,
ERC GOODSHAPE
@inria Saclay, France
Matt Venn
mattvenn
Engineer and Science Communication. On a mission to make ASICs more accessible. YosysHQ & Tiny Tapeout founder member.
@YosysHQ-GmbH @TinyTapeout Valencia, Spain
Jim Lewis
JimLewis
VHDL Verification Specialist, OSVVM author, VHDL Trainer (including on OSVVM), IEEE VHDL WG Chair, Yoga Teacher
SynthWorks / OSVVM Tigard, OR
Derek Kozel
dkozel
Member of GNU Radio leadership, RF design, Electronics, Open Source, MW0LNA
Cardiff, Wales
Ricardo F Tafas Jr
rftafas
Eletrical Engineer, MSC on Telecomunication, several times manager and Developer. Specialty on Hardware, HDLs (mostly VHDL and SysVerilog). Sometimes writer.
@espressif Campinas - SP
T. Meissner
tmeissner
FPGA-Engineer doing design and verification using VHDL, SystemVerilog, SVA and PSL.
Dresden, Germany
Thomas Parry
yrrapt
Analogue/Digital ASIC design, RF/SDR, High Reliability and Space
The Netherlands
Kate Temkin
ktemkin
Hardware hacker(s) & low-level engineer(s). Focus: tools to help you do cool things.
Archived repos @ktemkin-archive.
Avatar by https://twitter.com/feyrah
Denver, CO
Ahmed Shahein
ahmedshahein
I am a passionate HW engineer. DSP is my beloved passion. You can ask me in VHDL, Verilog, Matlab, and Bash.
Netherlands
Henrique Bucher
HFTrader
Consulting and development C++/FPGA/GPU. Focus on Ultra Low Latency Trading. Crypto. Ex-Citadel, ex-JP Morgan. Brazilian, BSc/MSc/PhD in Engineering.
Vitorian LLC Chicago, IL
Patrick Lehmann
Paebbels
Vice-Chair of the IEEE P1076 Working Group (VHDL Analysis and Standardization Group- VASG). I'm a VHDL expert and FPGA-technology trainer at @PLC2.
@PLC2 Bötzingen, Germany