@seldridge after removing firrtl_black_box_resource_files.f, what is the intended way to get the list of black-box files produced by firtool?

@tymcauley: Do you need to know the names of any of the generated blackboxes given that these will always show up in one of the output build directories?

I.e., BlackBoxPathAnno is a way of telling CIRCT to copy some file into another file relative to the output directory. BlackBoxInlineAnno is a way of having verbatim text written to a file relative to the output directory. Given this, the build system should be able to do a file glob of the know build areas to get all blackboxes generated in this way.

Note: I'm spitballing this here as I dropped this without much concern for existing users. 😬 Are you using this currently and how are you using it?

Ya, I just need to know the names of those generated blackbox files. Right now, they're showing up in my output directory along with all of the other generated SystemVerilog files. I'm using a build system similar to what Chipyard does: https://github.com/ucb-bar/chipyard/blob/973f8732d4ffeb8cc231edf109e84eef114e3d6e/common.mk#L188

Is there a way to place all of the blackbox files defined in Chisel into a subdirectory of the firtool output area?

Is there a way to place all of the blackbox files defined in Chisel into a subdirectory of the firtool output area?

firrtl.transforms.BlackBoxTargetDirAnno sets this. (You could alternatively do something in Chisel to setup the blackbox directory for all the annotations, though that may be really annoying.) Using this, you should be able to duplicate the behavior with a file glob or ls.

Note: I am entirely fine with reverting this if we need to! However, if dropping this shakes out a simpler solution with fewer ways of doing things that would be good. 😉

Okay, that annotation looks like it should do the trick, thanks! For the path provided in that annotation, can it be a relative path, and I'm assuming it would be relative to wherever firtool is executed from?

Yes, it can be relative. It should be relative to the -o path, not necessarily the path where firtool is executed from.

This breaks upstream Chisel as it relies on this file to find blackboxes through logic here: https://github.com/chipsalliance/chisel/blob/177579fe6159217b607d898ee5180445627a4427/src/main/scala/chisel3/simulator/package.scala#L236

I will plan to update svsim so that this will continue to work. svsim really shouldn't be relying on these undocumented filelists.

I also ran into #8672 while trying to experiment with firrtl.transforms.BlackBoxTargetDirAnno.