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Description
With chipsalliance/chisel#4717, Chisel has removed the ChiselAnnotation
API, which breaks the conditional inlining code here:
diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala
Lines 122 to 126 in a042ff6
if (wrapper.shouldBeInlined) { | |
chisel3.experimental.annotate(new ChiselAnnotation { | |
def toFirrtl = InlineAnnotation(toNamed) | |
}) | |
} |
As of Chisel 6.6.0, Chisel has one inlining API: the InlineInstance
trait: https://github.com/chipsalliance/chisel/blob/v6.6.0/src/main/scala/chisel3/util/experimental/Inline.scala#L41-L51
Chisel 7 will add the InlineInstanceAllowDedup
trait (in this PR chipsalliance/chisel#4508), which just adds the InlineAnnotation
, not the NoDedupAnnotation
: https://github.com/chipsalliance/chisel/blob/05c87bca07ebaa611b9e4486a7e041c59ff4c628/src/main/scala/chisel3/util/experimental/Inline.scala#L45-L50
Can we use these traits to recreate the shouldBeInlined
API?