Provide custom error for Mem masked write wrong data type #4805
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mwachs5
approved these changes
Mar 17, 2025
seldridge
approved these changes
Mar 17, 2025
| import chisel3.experimental.{requireIsChiselType, requireIsHardware, SourceInfo, SourceLine} | ||
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| object Mem extends Mem$Intf { | ||
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| @implicitNotFound("Masked write requires that the data type is a Vec, got ${T}.") |
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I didn't know you could reference the type here. Neat.
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@jackkoenig not sure which milestone to set for this |
Probably safe and easy to backport to 6.x, not super inclined to backport further than that these days. |
chiselbot
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Mar 17, 2025
(cherry picked from commit 93dad7f) # Conflicts: # core/src/main/scala-2/chisel3/MemIntf.scala # core/src/main/scala-3/chisel3/MemIntf.scala # core/src/main/scala/chisel3/Mem.scala # src/main/scala-2/chisel3/util/SRAM.scala
14 tasks
✅ Backports have been created
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Hard to test for this but easy to validate which I did.
Contributor Checklist
docs/src?Type of Improvement
Desired Merge Strategy
Release Notes
The old error was
Cannot prove that chisel3.UInt <:< chisel3.Vec[_], the new error isMasked write requires that the data type is a Vec, got chisel3.UInt.Reviewer Checklist (only modified by reviewer)
3.6.x,5.x, or6.xdepending on impact, API modification or big change:7.0)?Enable auto-merge (squash)and clean up the commit message.Create a merge commit.