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Merged
merged 78 commits into from
Jul 8, 2024
Merged

AArch64 update to LLVM 18 #2298

merged 78 commits into from
Jul 8, 2024

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Rot127
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@Rot127 Rot127 commented Mar 25, 2024 •
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Your checklist for this pull request

  • I've documented or updated the documentation of every function and struct this PR changes. If not so I've explained why.
  • I've added tests that prove my fix is effective or that my feature works (if possible)

Detailed description

Generated with: capstone-engine/llvm-capstone#45

New features/instructions

New features:

AArch64_FEATURE_HasPAuthLR,
AArch64_FEATURE_HasSMEFA64,
AArch64_FEATURE_HasFPMR,
AArch64_FEATURE_HasFP8,
AArch64_FEATURE_HasFAMINMAX,
AArch64_FEATURE_HasFP8FMA,
AArch64_FEATURE_HasSSVE_FP8FMA,
AArch64_FEATURE_HasFP8DOT2,
AArch64_FEATURE_HasSSVE_FP8DOT2,
AArch64_FEATURE_HasFP8DOT4,
AArch64_FEATURE_HasSSVE_FP8DOT4,
AArch64_FEATURE_HasLUT,
AArch64_FEATURE_HasSME_LUTv2,
AArch64_FEATURE_HasSMEF8F16,
AArch64_FEATURE_HasSMEF8F32,
AArch64_FEATURE_HasSVE2orSME2,
AArch64_FEATURE_HasCHK,
AArch64_FEATURE_HasGCS,
AArch64_FEATURE_HasCPA,

New instructions:

AArch64_INS_ADDPT,
AArch64_INS_AUTIA171615,
AArch64_INS_AUTIASPPC,
AArch64_INS_AUTIB171615,
AArch64_INS_AUTIBSPPC,
AArch64_INS_BF1CVTL2,
AArch64_INS_BF1CVTLT,
AArch64_INS_BF1CVTL,
AArch64_INS_BF1CVT,
AArch64_INS_BF2CVTL2,
AArch64_INS_BF2CVTLT,
AArch64_INS_BF2CVTL,
AArch64_INS_BF2CVT,
AArch64_INS_F1CVTL2,
AArch64_INS_F1CVTLT,
AArch64_INS_F1CVTL,
AArch64_INS_F1CVT,
AArch64_INS_F2CVTL2,
AArch64_INS_F2CVTLT,
AArch64_INS_F2CVTL,
AArch64_INS_F2CVT,
AArch64_INS_FAMAX,
AArch64_INS_FAMIN,
AArch64_INS_FCVTNB,
AArch64_INS_FMLALLBB,
AArch64_INS_FMLALLBT,
AArch64_INS_FMLALLTB,
AArch64_INS_FMLALLTT,
AArch64_INS_FMLALL,
AArch64_INS_FVDOTB,
AArch64_INS_FVDOTT,
AArch64_INS_GCSPOPCX,
AArch64_INS_GCSPOPM,
AArch64_INS_GCSPOPX,
AArch64_INS_GCSPUSHM,
AArch64_INS_GCSPUSHX,
AArch64_INS_GCSSS1,
AArch64_INS_GCSSS2,
AArch64_INS_GCSSTR,
AArch64_INS_GCSSTTR,
AArch64_INS_MADDPT,
AArch64_INS_MADPT,
AArch64_INS_MLAPT,
AArch64_INS_MSUBPT,
AArch64_INS_PACIA171615,
AArch64_INS_PACIASPPC,
AArch64_INS_PACIB171615,
AArch64_INS_PACIBSPPC,
AArch64_INS_PACNBIASPPC,
AArch64_INS_PACNBIBSPPC,
AArch64_INS_RETAASPPC,
AArch64_INS_RETABSPPC,
AArch64_INS_SUBPT,

Test plan

  • Fix current one.
  • Add new MC tests
  • Add tests for SME
  • Fuzzing

General detail testing comes afterwards, when testing in general is modernized.

Closing issues

closes #2269
closes #2270
closes #2268
closes #2285
closes #2363

@Rot127 Rot127 added the AArch64 Arch label Mar 25, 2024
@Rot127 Rot127 added this to the v6 milestone Mar 25, 2024
@Rot127 Rot127 mentioned this pull request Apr 26, 2024
Closed
@Rot127 Rot127 mentioned this pull request Apr 26, 2024
Closed
@hainest
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hainest commented Apr 30, 2024

Relative to the Mar 2024 spec, the system registers listed below don't currently have a representation in Capstone. I've not yet checked to see if they are in LLVM-18's tablegen.

DBGBCR{16-63}_EL1
DBGBVR{16-63}_EL1
DBGWCR{16-63}_EL1
DBGWVR{16-63}_EL1
ICV_AP0R{0-3}_EL1
ICV_AP1R{0-3}_EL1
ICV_BPR1_EL1
ICV_CTLR_EL1
ICV_DIR_EL1
ICV_EOIR{0-1}_EL1
ICV_HPPIR{0-1}_EL1
ICV_IAR{0-1}_EL1
ICV_IGRPEN{0-1}_EL1
ICV_NMIAR1_EL1
ICV_PMR_EL1
ICV_RPR_EL1
SPMEVCNTR{16-63}_EL0
SPMEVFILT2R{16-63}_EL0
SPMEVFILTR{16-63}_EL0
SPMEVTYPER{16-63}_EL0
SP_EL3
TRBMPAM_EL1

@Rot127
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Rot127 commented May 1, 2024

Couldn't find them in LLVM with grep as well.

@Rot127 Rot127 force-pushed the AArch64-llvm-18 branch from 5146db3 to df51ebc Compare May 10, 2024 08:10
Rot127 added 26 commits July 4, 2024 02:24
@Rot127
Fix: Increment op count after each list member is added.
4c060f4
@Rot127
Remove implicit write to NZCV for MSR Imm instructions.
37e61ab
@Rot127
Handle several alias operands.
9760361
@Rot127
Add details for zero alias with za0.h
9a24704
@Rot127
Add SME tile to write list if written
98c9130
@Rot127
Add write access flags to operands which are zeroed.
31c37c7
@Rot127
Add SME tests of capstone-engine#2285
5393e0e
@Rot127
Fix tests with latest syntax changes.
d87232f
@Rot127
Fix segfault if memory operand is only a label without register.
8c54f95
@Rot127
Fix python bindings
7c8734d
@Rot127
Attempt to fix clang-tidy warning for some configurations.
b833ce3
@Rot127
Add missing test file (accidentially blocked by gitignore.)
b1a87a4
@Rot127
Print clang-tidy version before linting.
c531fe3
@Rot127
Update differ save file
b93a512
@Rot127
Formatting
4c9ecfd
@Rot127
Use clang-tidy-15 as if possible.
3dda827
@Rot127
Remove search patterns for MC tests, since they need to be reworked a…
0ecfba8 
…nyways.
@Rot127
Enum to upper case change
db9ed62
@Rot127
Add information to read the OSS fuzz result.
2740b7e
@Rot127
Fix special case of SVE2 operands.
80fbd8d 
Apparently ZT0 registers can an index attached,
get which is BOUND to it. We have no "index for reg" field.
So it is simply saved as an immediate.
@Rot127
Handle LLVM expressions without asserts.
45f5eef
@Rot127
Ensure choices are always saved.
162ce0b
@Rot127
OP_GROUP enums can't be all upper case because they contain type info…
b50d7eb 
…rmation.
@Rot127
Fix compatibility header patching
47b8eec
@Rot127
Update saved_choices.json
a08b66f
@Rot127
Allow mode == None in test_corpus
369e530
@Rot127 Rot127 force-pushed the AArch64-llvm-18 branch from c5f64e0 to 369e530 Compare July 4, 2024 07:27
kabeor
kabeor approved these changes Jul 8, 2024
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Looks great, thanks!

@kabeor kabeor merged commit 9c5b48b into capstone-engine:next Jul 8, 2024
@Rot127 Rot127 deleted the AArch64-llvm-18 branch March 31, 2025 15:52
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AArch64 Arch Alpha Arch ARM Arch Auto-Sync-files Auto-Sync CS-core-files auto-sync Documentation LLVM-core-files auto-sync LLVM-generated-files Mips Arch PowerPC Arch RISCV Arch Sparc Arch SystemZ Arch TriCore Arch X86 Arch XCore Arch
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Capstone V6 Plan
Status: Done
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v6 - Alpha
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@Rot127 @hainest @FinnWilkinson @kabeor