x64: Add AVX encodings for cvt* instructions
#10954
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Helps to light the `CvtIntToFloatVex` instruction shape on 🔥.
abrown
approved these changes
Jun 6, 2025
| pub fn vcvttpd2dq_a<R: Registers>(inst: &inst::vcvttpd2dq_a<R>) -> String { | ||
| match inst.xmm_m128 { | ||
| XmmMem::Xmm(_) => "vcvttpd2dq".to_string(), | ||
| XmmMem::Mem(_) => "vcvttpd2dqx".to_string(), |
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I think this is to disambiguate between
VEX.128.66.0F.WIG E6 /r
VCVTTPD2DQ xmm1, xmm2/m128
and
VEX.256.66.0F.WIG E6 /r
VCVTTPD2DQ xmm1, ymm2/m256
where in the memory-to-register case the att-style assembler, without the x suffix, would look like vcvttpd2dq (%rax), %xmm1 and it's ambiguous as to which instruction you want. I think the x and y suffixes are used to disambiguate at the assembler level. Now if we used intel syntax...
Co-authored-by: Andrew Brown <andrew.brown@intel.com>
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Helps to light the
CvtIntToFloatVexinstruction shape on 🔥.