x64: Convert Div instructions to new assembler #10855
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Seem to be unrelated connection errors in CI like - Edit - They went away, now passes all tests |
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@alexcrichton is this good to go? |
abrown
approved these changes
Jun 4, 2025
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| inst("vdivss", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m32)]), vex(L128)._f3()._0f().op(0x5E).r(), _64b | compat | avx), | ||
| inst("vdivsd", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m64)]), vex(L128)._f2()._0f().op(0x5E).r(), _64b | compat | avx), |
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Just looking at the manual and, though this all will boil down to the same thing, I think we should be more pedantic and write:
Suggested change
| inst("vdivss", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m32)]), vex(L128)._f3()._0f().op(0x5E).r(), _64b | compat | avx), | |
| inst("vdivsd", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m64)]), vex(L128)._f2()._0f().op(0x5E).r(), _64b | compat | avx), | |
| inst("vdivss", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m32)]), vex(LIG)._f3()._0f().wig().op(0x5E).r(), _64b | compat | avx), | |
| inst("vdivsd", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m64)]), vex(LIG)._f2()._0f().wig().op(0x5E).r(), _64b | compat | avx), |
(And this probably means other VEX instructions should get checked but we don't have to do that in this PR).
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| inst("vdivps", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m128)]), vex(L128)._0f().op(0x5E).r(), _64b | compat | avx), | ||
| inst("vdivpd", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m128)]), vex(L128)._66()._0f().op(0x5E).r(), _64b | compat | avx), |
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Suggested change
| inst("vdivps", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m128)]), vex(L128)._0f().op(0x5E).r(), _64b | compat | avx), | |
| inst("vdivpd", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m128)]), vex(L128)._66()._0f().op(0x5E).r(), _64b | compat | avx), | |
| inst("vdivps", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m128)]), vex(L128)._0f().wig().op(0x5E).r(), _64b | compat | avx), | |
| inst("vdivpd", fmt("B", [rw(xmm1), r(xmm2), r(xmm_m128)]), vex(L128)._66().wig()._0f().op(0x5E).r(), _64b | compat | avx), |
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| (rule (x64_divsd src1 src2) | ||
| (xmm_rm_r_unaligned (SseOpcode.Divsd) src1 src2)) | ||
| (x64_divsd_a src1 src2)) |
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A nit to add the rule priority and, in these very short cases, fit it on a single line:
(rule 0 (x64_divsd src1 src2) x64_divsd_a src1 src2))
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| use crate::dsl::{Feature::*, Inst, Location::*, VexLength::*, align}; | ||
| use crate::dsl::{fmt, implicit, inst, r, rex, rw, vex}; |
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More nits:
Suggested change
| use crate::dsl::{Feature::*, Inst, Location::*, VexLength::*, align}; | |
| use crate::dsl::{fmt, implicit, inst, r, rex, rw, vex}; | |
| use crate::dsl::{Feature::*, Inst, Location::*, VexLength::*}; | |
| use crate::dsl::{align, fmt, implicit, inst, r, rex, rw, vex}; |
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Oops, looks like @alexcrichton and I raced; we can fix these nits later! |
abrown
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Jun 6, 2025
Some final review comments went unaddressed in bytecodealliance#10855 that this change resolve, primarily using `LIG` for non-vector definitions. I was going to add `.wig()` everywhere but, after thinking about it, it _is_ the default value for `vex()` and leaving it out reduces the amount of information one has to parse. This also cleans up a few extra lines I saw lying around.
github-merge-queue bot
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Jun 6, 2025
Some final review comments went unaddressed in #10855 that this change resolve, primarily using `LIG` for non-vector definitions. I was going to add `.wig()` everywhere but, after thinking about it, it _is_ the default value for `vex()` and leaving it out reduces the amount of information one has to parse. This also cleans up a few extra lines I saw lying around.
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Converts div instructions to new assembler. Remove old div impl from codegen for SSE variants, not Vex variants.