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aamarin
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Update phy_pharams structure, tests, and exp attrs
Change-Id: I02ddbd9a764d55af3edd786f6b5e7799a174a914 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72070 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73248 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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‎src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml

Lines changed: 48 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -120,42 +120,17 @@
120120
<mssAccessorName>mvpd_fwms</mssAccessorName>
121121
</attribute>
122122

123+
<!-- user_input_msdg attribute overrides start -->
123124
<attribute>
124-
<id>ATTR_MEM_EXP_FIRMWARE_EMULATION_MODE</id>
125-
<targetType>TARGET_TYPE_MEM_PORT</targetType>
126-
<description>
127-
Enable Special mode for Emulation Support
128-
</description>
129-
<valueType>uint8</valueType>
130-
<initToZero></initToZero>
131-
<enum>NORMAL = 0, EMULATION = 1</enum>
132-
<writeable/>
133-
<mssAccessorName>exp_firmware_emulation_mode</mssAccessorName>
134-
</attribute>
135-
136-
<attribute>
137-
<id>ATTR_MEM_EXP_CHIP_SELECT</id>
125+
<id>ATTR_MEM_EXP_CS_PRESENT</id>
138126
<targetType>TARGET_TYPE_MEM_PORT</targetType>
139127
<description>
140128
Indicate presence of DRAM at each Chip Select for PHY
141129
</description>
142-
<valueType>uint8</valueType>
143130
<initToZero></initToZero>
131+
<valueType>uint16</valueType>
144132
<writeable/>
145-
<mssAccessorName>exp_chip_select</mssAccessorName>
146-
</attribute>
147-
148-
<attribute>
149-
<id>ATTR_MEM_EXP_PHY_EQUALIZATION</id>
150-
<targetType>TARGET_TYPE_MEM_PORT</targetType>
151-
<description>
152-
Phy Equalization mode enable
153-
</description>
154-
<valueType>uint8</valueType>
155-
<initToZero></initToZero>
156-
<enum>DISABLE = 0, ENABLE = 1</enum>
157-
<writeable/>
158-
<mssAccessorName>exp_phy_equalization</mssAccessorName>
133+
<mssAccessorName>exp_cs_present</mssAccessorName>
159134
</attribute>
160135

161136
<attribute>
@@ -183,90 +158,106 @@
183158
</attribute>
184159

185160
<attribute>
186-
<id>ATTR_MEM_EXP_ODT_MAP_CS_WR</id>
161+
<id>ATTR_MEM_EXP_RCD_DIC</id>
187162
<targetType>TARGET_TYPE_MEM_PORT</targetType>
188163
<description>
189-
Desired ODT Value to write to the ranks
164+
CA and CS signal Driver Characteristics from F0RC03, F0RC04, F0RC05
190165
</description>
191-
<valueType>uint8</valueType>
166+
<valueType>uint16</valueType>
192167
<initToZero></initToZero>
193168
<writeable/>
194-
<mssAccessorName>exp_odt_map_cs_wr</mssAccessorName>
169+
<mssAccessorName>exp_rcd_dic</mssAccessorName>
195170
</attribute>
196171

197172
<attribute>
198-
<id>ATTR_MEM_EXP_ODT_MAP_CS_RD</id>
173+
<id>ATTR_MEM_EXP_RCD_VOLTAGE_CTRL</id>
199174
<targetType>TARGET_TYPE_MEM_PORT</targetType>
200175
<description>
201-
Desired ODT Value when reading from the ranks
176+
RCD operating voltage VDD and VrefCA control from F0RC0B and F0RC1x
202177
</description>
203-
<valueType>uint8</valueType>
178+
<valueType>uint16</valueType>
204179
<initToZero></initToZero>
205180
<writeable/>
206-
<mssAccessorName>exp_odt_map_cs_rd</mssAccessorName>
181+
<mssAccessorName>exp_rcd_voltage_ctrl</mssAccessorName>
207182
</attribute>
208183

209184
<attribute>
210-
<id>ATTR_MEM_EXP_RCD_DIC</id>
185+
<id>ATTR_MEM_EXP_DRAM_ADDRESS_MIRRORING</id>
211186
<targetType>TARGET_TYPE_MEM_PORT</targetType>
212187
<description>
213-
CA and CS signal Driver Characteristics from F0RC03, F0RC04, F0RC05
188+
Ranks that have address mirroring.
189+
This data is derived from SPD or VPD.
190+
Note: This is a bit-wise map and muliple ranks can be mirrored.
214191
</description>
215-
<valueType>uint8</valueType>
216192
<initToZero></initToZero>
193+
<valueType>uint8</valueType>
194+
<array>2</array>
217195
<writeable/>
218-
<mssAccessorName>exp_rcd_dic</mssAccessorName>
196+
<mssAccessorName>exp_dram_address_mirroring</mssAccessorName>
219197
</attribute>
220198

221199
<attribute>
222-
<id>ATTR_MEM_EXP_RCD_VOLTAGE_CTRL</id>
200+
<id>ATTR_MEM_EXP_RCD_SLEW_RATE</id>
223201
<targetType>TARGET_TYPE_MEM_PORT</targetType>
224202
<description>
225-
RCD operating voltage VDD and VrefCA control from F0RC0B and F0RC1x
203+
RCD slew rate control from F1RC02,F1RC03,F1RC04,F1RC05
226204
</description>
227-
<valueType>uint8</valueType>
228205
<initToZero></initToZero>
206+
<valueType>uint16</valueType>
229207
<writeable/>
230-
<mssAccessorName>exp_rcd_voltage_ctrl</mssAccessorName>
208+
<mssAccessorName>exp_rcd_slew_rate</mssAccessorName>
231209
</attribute>
232210

233211
<attribute>
234-
<id>ATTR_MEM_EXP_DRAM_ADDRESS_MIRRORING</id>
212+
<id>ATTR_MEM_EXP_3DS_HEIGHT</id>
235213
<targetType>TARGET_TYPE_MEM_PORT</targetType>
236214
<description>
237-
Ranks that have address mirroring.
238-
This data is derived from SPD or VPD.
239-
Note: This is a bit-wise map and muliple ranks can be mirrored.
215+
Explorer setting for 3DS stack
240216
</description>
241217
<initToZero></initToZero>
242-
<valueType>uint8</valueType>
243-
<array>2</array>
218+
<valueType>uint16</valueType>
219+
<enum>PLANAR = 0, H2 = 2, H4 = 4, H8 = 8</enum>
244220
<writeable/>
245-
<mssAccessorName>exp_dram_address_mirroring</mssAccessorName>
221+
<mssAccessorName>exp_3ds_height</mssAccessorName>
246222
</attribute>
247223

248224
<attribute>
249-
<id>ATTR_MEM_EXP_SPD_CL</id>
225+
<id>ATTR_MEM_EXP_SPD_CL_SUPPORTED</id>
250226
<targetType>TARGET_TYPE_MEM_PORT</targetType>
251227
<description>
252228
Cas Latency Supported by DRAM
253229
</description>
254230
<initToZero></initToZero>
255231
<valueType>uint32</valueType>
256232
<writeable/>
257-
<mssAccessorName>exp_spd_cl</mssAccessorName>
233+
<mssAccessorName>exp_spd_cl_supported</mssAccessorName>
258234
</attribute>
259235

260236
<attribute>
261-
<id>ATTR_MEM_EXP_RCD_SLEW_RATE</id>
237+
<id>ATTR_MEM_EXP_SPD_TAA_MIN</id>
262238
<targetType>TARGET_TYPE_MEM_PORT</targetType>
263239
<description>
264-
RCD slew rate control from F1RC02,F1RC03,F1RC04,F1RC05
240+
Minimum Cas Latency Time (tAAmin) in Picosecond (Byte 24)
265241
</description>
266242
<initToZero></initToZero>
267243
<valueType>uint16</valueType>
268244
<writeable/>
269-
<mssAccessorName>exp_rcd_slew_rate</mssAccessorName>
245+
<mssUnits>ps</mssUnits>
246+
<mssAccessorName>exp_spd_taa_min</mssAccessorName>
247+
</attribute>
248+
249+
<attribute>
250+
<id>ATTR_MEM_EXP_FIRMWARE_EMULATION_MODE</id>
251+
<targetType>TARGET_TYPE_MEM_PORT</targetType>
252+
<description>
253+
Enable Special mode for Emulation Support
254+
</description>
255+
<initToZero></initToZero>
256+
<valueType>uint8</valueType>
257+
<mssUnits>bool</mssUnits>
258+
<enum>NORMAL = 0, EMULATION = 1</enum>
259+
<writeable/>
260+
<mssAccessorName>exp_firmware_emulation_mode</mssAccessorName>
270261
</attribute>
271262

272263
</attributes>

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