library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std_unsigned.all;

package pkg is

  function f_gen(
    use_id         : boolean;
    id             : std_ulogic_vector(15 downto 0) := x"1234"
  ) return std_ulogic_vector;

end pkg;

package body pkg is

  constant C_ID           : std_ulogic_vector(15 downto 0) := x"0110";

  function f_if(c : boolean; t : std_ulogic; f : std_ulogic) return std_ulogic is
    variable r : std_ulogic;
  begin
    r := t when c else f;
    return r;
  end;

  function f_if(c : boolean; t : std_ulogic_vector; f : std_ulogic_vector) return std_ulogic_vector is
    variable r : std_ulogic_vector(t'range);
  begin
    r := t when c else f;
    return r;
  end;

  function f_gen(
    use_id         : boolean;
    id             : std_ulogic_vector(15 downto 0) := x"1234"
  ) return std_ulogic_vector is

    variable ret           : std_ulogic_vector(31 downto 0);
  begin
    ret := (
      31 downto 16 => C_ID,
      15 downto 0  => f_if(use_id, t=> id, f=> C_ID)
    );
    return ret;
  end;


end package body pkg;

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std_unsigned.all;

use std.env.stop;
use work.pkg.all;

entity tb_repro is
end entity;

architecture tb of tb_repro is


  constant x : std_logic_vector(31 downto 0) := f_gen(false);
  constant y : std_logic_vector(31 downto 0) := f_gen(true);

begin

  test_runner : process
  begin
    report to_string(x) severity note;
    report to_string(y) severity note;
    stop;
  end process;

end architecture;

nvc -a tb_repro.vhd -e tb_repro -r
** Error: no possible overload of F_IF has formal F
    > tb_repro.vhd:42
    |
 42 |       15 downto 0  => f_if(use_id, t=> id, f=> C_ID)
    |                                            ^ did you mean ID?