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[RVC] Add support for variable length instructions in the InstructionModel #127

@mortbopet

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@mortbopet

Currently, the InstructionModel (bottom right table in the processor tab) is built around the notion that all instructions in a program is equal in width. An example is the following, where we assume that an instruction is 4 bytes wide:

AInt InstructionModel::indexToAddress(const QModelIndex& index) const {
if (auto prog_spt = ProcessorHandler::getProgram()) {
return (index.row() * 4) + prog_spt->getSection(TEXT_SECTION_NAME)->address;
}
return 0;
}

Instead, we need a more advanced solution which informs the instruction model about relative addresses based on the result from disassembling. As a reminder, a disassembly result contains both the disassembled string as well as the number of bytes disassembled (instruction width): https://github.com/mortbopet/Ripes/blob/master/src/assembler/assembler.h#L73.

Currently we're simply taking whatever result we get from disassembling and setting that as the value in the column containing disassembled instructions, without it interacting with the rest of the instruction model logic:

QVariant InstructionModel::instructionData(AInt addr) const {
return ProcessorHandler::disassembleInstr(addr);
}

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