pass: unexpected register allocation failure #100
Description
@klauspost reported an unxepected register allocation failure in the following slack thread:
The following code illustrates the problem (look for the FIXME comments)
https://github.com/klauspost/compress/pull/186/files#diff-60d6e6209d2fc7873851f07b946a5dc7R230
After an initial analysis using the experimental debug printer #6 it appears we are getting duplicate entries in the live register sets, for example <virtual:20:1:8> below.
...
instruction {
addr = 0x0xc00010ed20
opcode = "CMPB"
terminal = false
branch = false
conditional = false
operands {
0: CL
1: DL
}
inputs {
0: <virtual:22:1:1>
1: <virtual:23:1:1>
}
outputs {
}
pred {
0x0xc00010ec80
}
succ {
0x0xc00010edc0
}
livein {
size = 14
<virtual:30:1:1>
<virtual:20:1:8>
<virtual:21:1:8>
FP
<virtual:20:1:8>
<virtual:22:1:1>
<virtual:30:1:4>
SP
<virtual:19:1:8>
<virtual:29:1:2>
<virtual:23:1:1>
<virtual:29:1:4>
<virtual:6:1:8>
<virtual:29:1:1>
}
liveout {
size = 12
<virtual:19:1:8>
<virtual:21:1:8>
<virtual:20:1:8>
<virtual:29:1:1>
<virtual:29:1:4>
<virtual:29:1:2>
<virtual:6:1:8>
<virtual:30:1:1>
<virtual:30:1:4>
<virtual:20:1:8>
SP
FP
}
}
...