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cpu/sam0_common: enable static voltages #21555

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Merged
merged 3 commits into from
Jun 23, 2025

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HendrikVE
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The DAC needs to set up a conversion refresh in order to hold a static voltage, so just do it by default. Also add the option to keep the DAC running during standby mode.

Testing procedure

Can be tested with tests/periph/dac/main.c e.g. on a same54-xpro.

Issues/PRs references

Fixes a configuration issue introduced by #21548

DAC_CTRLA_SWRST clears all registers, so it also clears the config
of the first DAC line after configuring the second DAC line.
@github-actions github-actions bot added Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: cpu Area: CPU/MCU ports labels Jun 20, 2025
@HendrikVE HendrikVE requested a review from maribu June 20, 2025 08:22
@maribu maribu enabled auto-merge June 20, 2025 08:27
@crasbe crasbe added Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Jun 20, 2025
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riot-ci commented Jun 20, 2025

Murdock results

✔️ PASSED

b157d5c cpu/sam0_common/periph/dac.c: do conversion refresh by default

Success Failures Total Runtime
10378 0 10379 14m:18s

Artifacts

/* Settings can only be changed when DAC is disabled, reset config */
DAC->CTRLA.reg = DAC_CTRLA_SWRST;
/* Settings can only be changed when DAC is disabled */
DAC->CTRLA.reg &= ~DAC_CTRLA_ENABLE;
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Since there are only two bits, you could also just

Suggested change
DAC->CTRLA.reg &= ~DAC_CTRLA_ENABLE;
DAC->CTRLA.reg = 0;

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For some CPUs there are three bits. One of them is the bit to enable operation during standby power mode:

typedef union {
  struct {
    uint8_t  SWRST:1;          /*!< bit:      0  Software Reset                     */
    uint8_t  ENABLE:1;         /*!< bit:      1  Enable                             */
    uint8_t  RUNSTDBY:1;       /*!< bit:      2  Run in Standby                     */
    uint8_t  :5;               /*!< bit:  3.. 7  Reserved                           */
  } bit;                       /*!< Structure used for bit  access                  */
  uint8_t reg;                 /*!< Type      used for register access              */
} DAC_CTRLA_Type;

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But now you are writing the entire CTRLA reg anyway at the end, you might as well set it all to 0 here 😉

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But 0 feels like a magic number to me and I like the fact that clearing the bit makes the intention clear.

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@benpicco benpicco Jun 20, 2025

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Well it saves two instructions - but yea, not really that much relevant on init.

auto-merge was automatically disabled June 20, 2025 14:29

Head branch was pushed to by a user without write access

@HendrikVE HendrikVE force-pushed the hendrik/dac-changes branch from fc2f722 to e2695eb Compare June 20, 2025 14:29
@HendrikVE HendrikVE force-pushed the hendrik/dac-changes branch from e2695eb to 4e442a8 Compare June 20, 2025 15:33
@HendrikVE HendrikVE force-pushed the hendrik/dac-changes branch from 4e442a8 to 4259152 Compare June 20, 2025 15:47
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check commits thinks your commit message is too long 😕 (>72 characters)

@HendrikVE HendrikVE force-pushed the hendrik/dac-changes branch from 4259152 to b157d5c Compare June 23, 2025 08:04
@benpicco benpicco added this pull request to the merge queue Jun 23, 2025
Merged via the queue into RIOT-OS:master with commit 55c2061 Jun 23, 2025
25 checks passed
@Teufelchen1 Teufelchen1 added this to the Release 2025.07 milestone Jul 14, 2025
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Area: cpu Area: CPU/MCU ports CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation
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6 participants