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merged 1 commit into from
May 24, 2025

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crasbe
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@crasbe crasbe commented May 24, 2025

Contribution description

The current ADC settings set the reference to the internal 1V reference with a x1 gain. This means that the maximum voltage that can be measured with any analog input is 1V, which is usually not sufficient for most applications.
Therefore the default value is changed to use the external VDDA input, which is 3.3V (internally divided by 2) and the gain to x1/2. This allows to measure voltages up to VDDA on any analog input.

Testing procedure

You can run the tests/periph/adc example with an external voltage source connected. You should see that with master, the ADC values max out at about 1V (or 2V for the battery input).

I connected a 0.8V voltage to the BAT input, which has a 1/2 resistor divider.

master : The values should be 0.8/1.0 * 0.5 * {256, 1024, 4096, 65536} = {102, 410, 1638, 26214} on ADC_LINE(6)):

2025-05-24 11:49:20,768 # ADC_LINE(0): -1 255 1023 4095    -1 65520
2025-05-24 11:49:20,771 # ADC_LINE(1): -1 255 1023 4095    -1 65520
2025-05-24 11:49:20,773 # ADC_LINE(2): -1 255 1023 4095    -1 65520
2025-05-24 11:49:20,775 # ADC_LINE(3): -1 255 1023 4095    -1 65520
2025-05-24 11:49:20,777 # ADC_LINE(4): -1 255 1023 4095    -1 65520
2025-05-24 11:49:20,779 # ADC_LINE(5): -1 255 1023 4095    -1 65520
2025-05-24 11:49:20,781 # ADC_LINE(6): -1 103  415 1664    -1 26630

This PR: The values should be: 0.8/3.3 * 0.5 * {256, 1024, 4096, 65536} = {31, 124, 496, 7944} on ADC_LINE(6)):

2025-05-24 11:45:03,555 #
2025-05-24 11:45:03,655 # ADC_LINE(0): -1  91  373 1496    -1 24508
2025-05-24 11:45:03,657 # ADC_LINE(1): -1  81  361 1504    -1 25126
2025-05-24 11:45:03,659 # ADC_LINE(2): -1  86  379 1534    -1 25398
2025-05-24 11:45:03,661 # ADC_LINE(3): -1  68  317 1373    -1 22436
2025-05-24 11:45:03,663 # ADC_LINE(4): -1  90  390 1621    -1 25188
2025-05-24 11:45:03,666 # ADC_LINE(5): -1  91  379 1549    -1 23639
2025-05-24 11:45:03,668 # ADC_LINE(6): -1  31  125  505    -1  8115

Issues/PRs references

Found in #21022.

The ADC configuration was set when the Feather-M0 was introduced in #7510 and never changed since.

The current ADC settings set the reference to the internal 1V
reference with a x1 gain. This means that the maximum voltage
that can be measured with any analog input is 1V, which is
usually not sufficient for most applications.
Therefore the default value is changed to use the external VDDA
input, which is 3.3V (internally divided by 2) and the gain to
x1/2. This allows to measure voltages up to VDDA on any analog
input.
@crasbe crasbe requested a review from miri64 May 24, 2025 11:53
@crasbe crasbe added Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors) CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels May 24, 2025
@github-actions github-actions bot added the Area: boards Area: Board ports label May 24, 2025
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riot-ci commented May 24, 2025

Murdock results

✔️ PASSED

5b0300e boards/feather-m0: correct ADC settings

Success Failures Total Runtime
564 0 564 02m:48s

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didn't test but lgtm

@Teufelchen1 Teufelchen1 added this pull request to the merge queue May 24, 2025
Merged via the queue into RIOT-OS:master with commit a4a4918 May 24, 2025
28 checks passed
@crasbe crasbe deleted the pr/featherm0_adc branch May 24, 2025 16:56
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crasbe commented May 24, 2025

Thanks :)

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3 participants