cpu/sam3: fix PMC enable/disable peripheral clock access #21168
Merged
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Contribution description
This PR fixes the access of PMC enable/disable peripheral clock.
PMC_PCERx
registers are labelled write-only in SAM3/SAM4S datasheet. Thus writing 0 has no effect. This means we cannot usePCERx
to disable a peripheral clock. Instead one must usePCEDx
register to properly disable a peripheral clock.As both registers (enable/disable) are write-only, this PR also drops the read-modify-write for a single write.
Testing procedure
CI should be enough I guess.
Issues/PRs references
None