Fix circuit-metadata propagation in SabreLayout
#14186
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This has been a bug since Qiskitgh-10712, but wasn't caught by the integration test in the test suite because the circuit has a perfect layout, so the layout stage was short-circuiting out after VF2.
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One or more of the following people are relevant to this code:
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Pull Request Test Coverage Report for Build 14312338336Details
💛 - Coveralls |
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Should we also mark this for backport to |
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Yeah, I'd intended to. I can tell the bot. |
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@Mergifyio backport stable/2.0 stable/1.4 |
✅ Backports have been created
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mtreinish
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Apr 7, 2025
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…14190) * Fix circuit-metadata propagation in `SabreLayout` (#14186) This has been a bug since gh-10712, but wasn't caught by the integration test in the test suite because the circuit has a perfect layout, so the layout stage was short-circuiting out after VF2. (cherry picked from commit 2504bde) # Conflicts: # qiskit/transpiler/passes/layout/sabre_layout.py * Fix merge conflicts * Adjust plugins used in testing for 1.4.x --------- Co-authored-by: Jake Lishman <jake.lishman@ibm.com> Co-authored-by: Matthew Treinish <mtreinish@kortar.org>
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Summary
This has been a bug since gh-10712, but wasn't caught by the integration test in the test suite because that constructs a because the circuit has a perfect layout, so the layout stage was short-circuiting out after VF2.
Details and comments
I caught this by making a buggy version of VF2 that doesn't recognise
Target2q links without a defined error.