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Ancilla-Free Quantum Adder with Sublinear Depth #13975

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Merged
merged 36 commits into from
May 8, 2025

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patelvyom
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Summary

This PR introduces an implementation of Ancilla-Free Quantum Adder with Sublinear Depth. The implementation follows the paper’s methodology, leveraging optimized CNOT and Toffoli ladder constructions to achieve an efficient ripple-carry addition without ancillary qubits. It achieves an overall depth of O(log² n) and gate count of O(n log(n)) without using any ancillae.

Details and comments

The implementation relies on the Log-depth MCX using conditionally clean ancillae introduced in #13922. The current version is not functional because log-depth MCX is not yet merged into main. I welcome any suggestions in the meantime. Since #13922 is part of the Qiskit 2.0 feature, I thought this might make a good addition. Tagging @ShellyGarion as you are already familiar with some of the changes.

@qiskit-bot qiskit-bot added the Community PR PRs from contributors that are not 'members' of the Qiskit repo label Mar 9, 2025
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coveralls commented Apr 1, 2025

Pull Request Test Coverage Report for Build 14886717457

Warning: This coverage report may be inaccurate.

This pull request's base commit is no longer the HEAD commit of its target branch. This means it includes changes from outside the original pull request, including, potentially, unrelated coverage changes.

Details

  • 65 of 66 (98.48%) changed or added relevant lines in 5 files are covered.
  • 19 unchanged lines in 3 files lost coverage.
  • Overall coverage increased (+0.005%) to 87.835%

Changes Missing Coverage Covered Lines Changed/Added Lines %
qiskit/transpiler/passes/synthesis/hls_plugins.py 8 9 88.89%
Files with Coverage Reduction New Missed Lines %
crates/accelerate/src/unitary_synthesis.rs 1 94.85%
crates/qasm2/src/lex.rs 6 91.48%
crates/qasm2/src/parse.rs 12 97.15%
Totals Coverage Status
Change from base Build 14848101443: 0.005%
Covered Lines: 74572
Relevant Lines: 84900

💛 - Coveralls

@patelvyom patelvyom marked this pull request as ready for review April 1, 2025 03:34
@patelvyom patelvyom requested a review from a team as a code owner April 1, 2025 03:34
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@patelvyom
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The core adder is now functional. Where should I add tests? They are currently located in test/python/circuit/library/test_adders.py. I am guessing they will eventually me moved to test/python/synthesis?

@ShellyGarion ShellyGarion added this to the 2.1.0 milestone Apr 1, 2025
@ShellyGarion ShellyGarion added the Changelog: New Feature Include in the "Added" section of the changelog label Apr 1, 2025
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ShellyGarion commented Apr 1, 2025

@patelvyom - Thanks for your contribution to Qiskit!
For now, you can put your tests in: test/python/circuit/library/test_adders.py.
(We can always refactor them later if needed, but currently it's a good place for them).

@ShellyGarion ShellyGarion added mod: circuit Related to the core of the `QuantumCircuit` class or the circuit library synthesis labels Apr 1, 2025
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@patelvyom - thank you very much for another high-quality and important contribution to qiskit!

I have a few comments and questions:

  1. I am not sure if we would like to add more arithmetic gates to the circuit library, or use them only via the HLS plugin (see #13354).
    Anyway, could you please add the "see also" comment that appear in the other adders?
    @Cryoris - what is your opinion?

  2. I noticed that you changed the default definition of the adder gate to use this synthesis method. Could you please add in the PR some benchmarks (on cx-count and depth) to support this decision?
    I agree that asymptotically it looks better, but I wonder if this remains correct when dealing with small number of qubits.

  3. Is it possible to add some tests on the synthesis including CX cost and circuit depth?

  4. Could you also add release notes?

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Re CX count: Yes, I've been working on that. I actually found something interesting: it appears that it's not better compared to HalfAdder with ancilla. I am still in the process of creating some plots to see what the ideal conditions are for using this adder. I'll resolve your comments soon as well.

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I'll actually wait until #14143 is merged. That way we don't have to call MCX directly from synthesis and also there are many cases where we have more than 2 dirty ancillae available so we can let the transpiler figure out optimal CX decomp.

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@patelvyom - thank you very much for your contribution to qiskit! The code is well-written.

  1. We currently don't want to add to the circuit library specific adders, like RVRippleCarryAdder, and plan to deprecate all the other specific adders, in favor of the HalfAdderGate etc. Could you please remove it from your code?

  2. According to your results, it seems that except of n=4, 'adder_ripple_rv25' is better than 'adder_qft_d00'. For n>=5 other methods are better, but they require using ancilla qubits.
    We should probably add some benchmarks, but this could be done in another PR.

I have some other minor comments.

@ShellyGarion ShellyGarion self-requested a review May 6, 2025 08:14
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ShellyGarion previously approved these changes May 6, 2025
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@patelvyom - thanks for another high-quality contribution to qiskit!
It looks good to me.
@alexanderivrii @Cryoris - do you have any further comments?

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This looks great, I just have some comments on the coding bits below 🙂

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This is a really useful contribution! Not only the newly implemented scheme leads to fewer 2-qubit gates, also the 1-gates are in Clifford+T (and not small-angle rotations we would get when using a QFT-based adder). I have left a few really minor comments.

Co-authored-by: Julien Gacon <gaconju@gmail.com>
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I believe I fixed all suggestions. Let me know in case I missed something.

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Thanks for addressing all of my points!
@Cryoris, do you have any additional comments?

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great, thank you for this nice contribution!

@Cryoris Cryoris added this pull request to the merge queue May 8, 2025
Merged via the queue into Qiskit:main with commit 25972ae May 8, 2025
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6 participants