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Conditionals prevent identifying equivalent circuits/DAGs #3164

@kdk

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@kdk

The circuit identity check does not distinguish between classical wires used as cargs and classical wires used as conditionals, and so the following two circuits are marked as non-equivalent:

>>> import qiskit as qk
>>> qr = qk.QuantumRegister(2)
>>> cr = qk.ClassicalRegister(1)
>>> qc1 = qk.QuantumCircuit(qr, cr)
>>> qc1.h(0).c_if(cr, 0)
>>> qc1.h(1).c_if(cr, 0)
>>> print(qc1)
          ┌───┐
q0_0: |0>─┤ H ├────────
          └─┬─┘  ┌───┐
q0_1: |0>───┼────┤ H ├─
            │    └─┬─┘
         ┌──┴──┐┌──┴──┐
 c0_0: 0 ╡ = 0 ╞╡ = 0 ╞
         └─────┘└─────┘
>>> qc2 = qk.QuantumCircuit(qr, cr)
>>> qc2.h(1).c_if(cr, 0)
>>> qc2.h(0).c_if(cr, 0)
>>> print(qc2)
                 ┌───┐
q0_0: |0>────────┤ H ├─
          ┌───┐  └─┬─┘
q0_1: |0>─┤ H ├────┼───
          └─┬─┘    │
         ┌──┴──┐┌──┴──┐
 c0_0: 0 ╡ = 0 ╞╡ = 0 ╞
         └─────┘└─────┘
>>> qc1 == qc2
False

Since both gates use c0 as a condition, and there is no gate between them which uses c0 as a carg, it should be possible to determine that the order of the two gates on c0 is not important. Ref. test.python.transpiler.test_cx_direction.TestCXDirection.test_preserves_conditions .

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