Vice-Chair of the IEEE P1076 Working Group (VHDL Analysis and Standardization Group- VASG). I'm a VHDL expert and FPGA-technology trainer at @PLC2.
- Bötzingen, Germany
-
01:13
(UTC +02:00) - https://Paebbels.github.io/
- @PaebbelsLemmi
- in/lehmann-patrick
- https://openhub.net/accounts/Paebbels
Highlights
yuri@FreeBSD
yurivict
I am a physicist and a computer engineer whose interests lie in the interface of physics, chemistry and biochemistry.
I am also a FreeBSD committer yuri@.
Sebastian Kaupper
skaupper
Interested in systems programming (C++ and Rust, primarily), FPGA design (VHDL) and general tool programming (Python).
RIEGL Laser Measurement Systems GmbH Austria
Chris Sewell
chrisjsewell
Open source developer and materials researcher. Working towards open source, reproducible and shareable science solutions 😀
École Polytechnique Fédérale de Lausanne Switzerland
sphinx-extensions2
A set of my sphinx-extensions, which I hope others will join me in maintaining 😄
Switzerland
Build The Docs (BTD)
buildthedocs
Container-based lightweight multi-version documentation generator
Adam Turner
AA-Turner
Python Committer and PEP Editor. Maintainer of Sphinx and Docutils.
University of Oxford London / Oxford
stnolting
Roads? Where we're going we don't need roads. - "Doc" Emmett L. Brown
@fraunhofer-ims 🇪🇺 European Union
Ahmed Shahein
ahmedshahein
I am a passionate HW engineer. DSP is my beloved passion. You can ask me in VHDL, Verilog, Matlab, and Bash.
Netherlands
Rudolf Usselmann
www-asics-ws
ASICS/FPGA/System Design House. IP Cores and design services. From Concept to final product. Architecture, Design, Implementation.
ASICS World Services, Co. Ltd.
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